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ICESTARS addresses a series of critical issues or "bottlenecks" in the currently-available infrastructure for the design and simulation of new and highly-complex Radio Frequency (RF) front ends operating beyond 10 and up to 100 GHz. Future systems demand an increasing blend of analogue and digital functionalities. The ICESTARS research will accelerate the chip development process in the extremely high frequency (EHF) range to accomplish future demands for higher capacity channels. The key to enable the realisation of single-chip integration of high-GHz wireless modules is resolving the shortcomings in available design flows.

ICESTARS aims at an efficient connection between the frequency domain – where the RF part of wireless transceiver systems is usually designed – with the time domain where the digital signal processing and control logic are generally developed. ICESTARS will introduce not only novel Computer Aided Design (CAD) tools but also the mathematical methods to deal with analogue/digital mixed signal simulation and future challenges in system design and methodologies, thus enabling European developers of integrated circuits (IC) for RF (RF-IC) to maintain their top position at the global telecommunication market.

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ICESTARS (Integrated Circuit/EM Simulation and Design Technologies for Advanced Radio Systems-on-chipis) a collaborative research project within the research program "Information and communication technologies" (ICT) of the Seventh Framework Programme for Research and Technological Development (FP7) funded by the European Union (EU).